Principal Engineer / Expert in Formal Methods (Chip & System Design)

Job Title: Principal Engineer / Expert in Formal Methods Location: Paris or Grenoble, France Number of Openings: 2

About Us: We are a leading research team at the forefront of formal verification advancements for chip design and system-level verification. As our team grows, we seek two highly skilled engineers to join us in Paris or Grenoble. This is an exciting opportunity to work on groundbreaking projects, leveraging formal verification techniques to ensure reliability and scalability in next-generation technologies.

Position Overview:

We are hiring for Principal Engineer and Expert in Formal Verification roles to drive our work in two main areas:

1. High-Speed Direction: Focusing on high-speed signal modulation, large bandwidth design, and protocol layer standards (224 Gbps and beyond).

2. Board-Level Process Reliability Direction: Ensuring reliable assembly of large-sized chips on PCBs, addressing challenges like package/PCB warpage, deformation, and micro-assembly technologies.

These roles involve leading formal verification initiatives for both chip design and system-level verification, with a particular emphasis on the application of formal methods in chip reliability and system modeling. Candidates joining our Paris team will have an opportunity to lead a new team, providing both strategic and technical guidance.

Key Responsibilities:

• Formal Verification Leadership: Lead the development and application of formal verification techniques for chip design and system-level verification, particularly in high-speed and board-level reliability contexts.

• Interdisciplinary Collaboration: Work closely with interdisciplinary teams to incorporate formal verification into the design process, optimizing for high-speed performance and long-term reliability.

• Research and Innovation: Conduct research on advanced formal methods, developing solutions that enhance project efficiency, accuracy, and scalability.

• Mentorship and Team Development: Provide mentorship to junior engineers, guiding the development of formal verification tools and methodologies. For Paris-based roles, assume a leadership position to establish and grow the local team.

Qualifications:

• Formal Verification Expertise: Extensive experience in formal verification with a practical focus on both chip design and EDA tools as well as system-level modeling and verification.

• Technical Proficiency: Proficiency in hardware description languages, system modeling, and verification with advanced knowledge in model checking, logic synthesis, and symbolic execution.

• Academic Background: PhD in computer science, formal methods, or a related field.

• Leadership Skills: Excellent leadership, problem-solving, and collaborative skills with a strategic mindset.

Why Join Us?

• Growth Opportunity: Be a foundational part of our Paris team or join our established team in Grenoble, contributing to meaningful projects at a global scale.

• Cutting-Edge Work: Engage in innovative projects that advance both chip design and system-level verification, collaborating with experts in the field to push the boundaries of formal verification.

How to Apply: Please submit your resume and a cover letter detailing your experience with formal verification, chip design, and system-level verification.